Custom state-model ASICs for scientific and engineering simulation.
Consistent compute, state by state.
Noetic is developing workflow-specific chips around state-space models—built for predictable work at every step.
A live illustration: a four-word state model reads one input, updates its fixed state with the same seven operations, and writes one output, on every step.
A four-word state model running in this page: same state, same seven operations, every step. Illustrative—not the Noetic ISA.
- Workflow
- State model
- Silicon
- Open software
The design target
Simulation needs more than average speed.
It needs a compute path whose work stays legible from one state update to the next. A pipeline that jitters is hard to trust, hard to schedule around, and hard to compare across runs.
- MEM
- GROWS
- STEP
- DRIFTS
- MEM
- FIXED
- STEP
- FIXED
Conceptual trace, not measured data. Benchmarking is in development.
Why state models, why silicon
A model class that looks like hardware.
During recurrent inference, state-space models carry history in a fixed-size state and perform a predictable form of work at each step. That structure can map cleanly to a regular datapath.
01 / State
A bounded recurrent state keeps history without growing the active state at each step.
Order first, then design
Start with the workflow.
A shared architecture, configured around each workload.
-
01
Workflow
Begin with a specific scientific or engineering simulation.
-
02
State model
Quantize or distill a model for the target workload.
-
03
Architecture
Map precision, on-chip state, and the hardware/software split.
-
04
Open software
Deliver the part with an open software layer.
- Architecture
- RTL
- Verification
- Physical design
- Software
Benchmarks and applications
High-dimensional workflows where state can carry the physics.
Two lists, kept apart on purpose. Benchmark areas are the workflows we measure first. Applications are where the same architecture is meant to work.
Measured first
Initial benchmark areas
The four target workflows we are turning into benchmarks and metrics the architecture can reference, run against the Jetson and unified-memory systems teams use today.
In development · no results yet
- B1
Heat flow
Thermal systems
- B2
Plasma physics
Dynamic fields
- B3
Photonics
Wave propagation
- B4
Quantitative biology
Complex systems
Built for
Applications
The wider field the shared architecture is configured around. Each part starts from one specific workflow; B1–B4 are the first of these to be measured.
One workflow per order
- A1
Data center dynamics and scaling
Heat flow and scaling simulation for compute facilities
- A2
Quantitative biology
Complex, high-dimensional biological systems
- A3
World model generation
Rich visual and physical information, encoded consistently
- A4
Physics
Plasma, photonics, and other solvers stepping through time or space
- A5
Engineering
Design work that still falls back on physical tests
- A6
Other scientific and engineering workloads
Simulation-heavy workflows teams already know and already pay to run
White paper · September 2026 · 5 pages
The thesis behind Noetic.
Why state models and specialized silicon belong together.
